Image sensor

ABSTRACT

An image sensor includes a pixel array including a plurality of pixels arranged in a first direction and a second direction. Each pixel of the plurality of pixels includes a plurality of photodiodes disposed adjacent to one another in at least one of the first direction and the second direction. The image sensor further includes a control logic configured to generate image data by obtaining pixel signals from the plurality of pixels, and read a pixel voltage corresponding to charges generated by two or more of the plurality of photodiodes included in one of the plurality of pixels, at substantially the same time.

CROSS-REFERENCE TO RELATED APPLICATIONS

This application is a continuation of U.S. patent application Ser. No.17/370,724 filed Jul. 8, 2021, which is a continuation of U.S. patentapplication Ser. No. 16/291,345 filed on Mar. 4, 2019, and issued asU.S. Pat. No. 11,094,735 on Aug. 17, 2021, which claims priority under35 U.S.C. § 119 to Korean Patent Application No. 10-2018-0085245 filedon Jul. 23, 2018 in the Korean Intellectual Property Office, thedisclosures of which are incorporated by reference herein in theirentirety.

TECHNICAL FIELD

Example embodiments of the present inventive concept relate to an imagesensor.

DISCUSSION OF THE RELATED ART

An image sensor is a semiconductor-based sensor that receives light togenerate an electrical signal. An image sensor may include a pixel arrayhaving a plurality of pixels, and a logic circuit that drives the pixelarray and generates an image. The plurality of pixels may include aphotodiode that generates charges in response to external light, and apixel circuit that converts charges generated by the photodiode into anelectrical signal. The image sensor may be applied to a wide variety ofdevices. For example, the image sensor may be used in a smartphone, atablet PC, a laptop computer, a television, a vehicle, etc., in additionto being used in a general camera for capturing photos or videos.Recently, various methods for improving an autofocusing function of theimage sensor have been proposed to improve the quality of an imagecaptured by the image sensor.

SUMMARY

Example embodiments of the present inventive concept provide an imagesensor capable of providing an improved autofocusing function, andcapable of improving a read-out time for reading a pixel voltage,improving power consumption according to a read-out operation, andimproving a noise characteristic.

According to an example embodiment of the present inventive concept, animage sensor includes a pixel array and a control logic. The pixel arrayincludes a plurality of pixels arranged in a first direction and asecond direction. Each of the plurality of pixels includes a pluralityof photodiodes divided into a first photodiode group and a secondphotodiode group, and at least one of the first photodiode group and thesecond photodiode group comprises two or more of the plurality ofphotodiodes being adjacent to one another in at least one of the firstdirection and the second direction. The control logic is configured togenerate image data by obtaining pixel signals from the plurality ofpixels, and read a pixel voltage corresponding to charges generated bytwo or more of the plurality of photodiodes included in one of theplurality of pixels, at substantially the same time.

According to an example embodiment of the present inventive concept, animage sensor includes a pixel array and a control logic. The pixel arrayincludes a plurality of pixels. The control logic is configured togenerate image data using charges generated in each of the plurality ofpixels. Each of the plurality of pixels includes a plurality ofphotodiodes formed at about a same depth in a semiconductor substrate, apixel circuit below the plurality of photodiodes, and a deviceconnection layer that physically connects at least portions of theplurality of photodiodes to each other and being disposed between thepixel circuit and the plurality of photodiodes.

According to an example embodiment of the present inventive concept, animage sensor includes a pixel array and a control logic circuit. Thepixel array includes a plurality of pixels. The control logic circuit isconfigured to generate image data using charges generated in each of theplurality of pixels. Each of the plurality of pixels includes aplurality of photodiodes formed at about a same depth in a semiconductorsubstrate, a plurality of transfer transistors connected to theplurality of photodiodes, and a connection line that connects gateelectrode layers of at least a portion of transfer transistors among theplurality of transfer transistors to each other.

BRIEF DESCRIPTION OF THE DRAWINGS

The above and other features of the present inventive concept willbecome more apparent by describing in detail example embodiments thereofwith reference to the accompanying drawings, in which:

FIG. 1 is a diagram illustrating an image processing apparatus includingan image sensor, according to an example embodiment of the presentinventive concept.

FIGS. 2 and 3 are diagrams illustrating an image sensor, according toexample embodiments of the present inventive concept.

FIG. 4 is a diagram illustrating an operation of an image sensor,according to an example embodiment of the present inventive concept.

FIG. 5 is a diagram illustrating a pixel array of an image sensor,according to an example embodiment of the present inventive concept.

FIGS. 6 and 7 are circuit diagrams illustrating a pixel circuit of animage sensor, according to example embodiments of the present inventiveconcept.

FIGS. 8 to 12 are diagrams illustrating a pixel structure of an imagesensor, according to an example embodiment of the present inventiveconcept.

FIGS. 13 and 14 are diagrams illustrating a pixel structure of an imagesensor, according to an example embodiment of the present inventiveconcept.

FIGS. 15 and 16 are diagrams illustrating a pixel structure of an imagesensor, according to an example embodiment of the present inventiveconcept.

FIG. 17 is a diagram illustrating an image sensor, according to anexample embodiment of the present inventive concept.

FIG. 18 is a circuit diagram illustrating a pixel circuit of an imagesensor, according to an example embodiment of the present inventiveconcept.

FIG. 19 is a timing diagram illustrating an operation of an imagesensor, according to an example embodiment of the present inventiveconcept.

FIG. 20 is a block diagram illustrating an electronic device includingan image sensor, according to an example embodiment of the presentinventive concept.

DETAILED DESCRIPTION

Example embodiments of the present inventive concept will be describedmore fully hereinafter with reference to the accompanying drawings. Likereference numerals may refer to like elements throughout theaccompanying drawings.

Herein, spatially relative terms, such as “beneath”, “below”, “lower”,“under”, “above”, “upper”, etc., may be used herein for ease ofdescription to describe one element or feature's relationship to anotherelement(s) or feature(s) as illustrated in the figures. It will beunderstood that the spatially relative terms are intended to encompassdifferent orientations of the device in use or operation in addition tothe orientation depicted in the figures. For example, if the device inthe figures is turned over, elements described as “below” or “beneath”or “under” other elements or features would then be oriented “above” theother elements or features. Thus, the exemplary terms “below” and“under” can encompass both an orientation of above and below.

Further, it should be understood that descriptions of features oraspects within each example embodiment should typically be considered asavailable for other similar features or aspects in other exampleembodiments, unless the context clearly indicates otherwise.

Further, when two or more elements or values are described as beingsubstantially the same as or about equal to each other, it is to beunderstood that the elements or values are identical to each other,indistinguishable from each other, or distinguishable from each otherbut functionally the same as each other as would be understood by aperson having ordinary skill in the art. It will be further understoodthat when two components or directions are described as extendingsubstantially parallel or perpendicular to each other, the twocomponents or directions extend exactly parallel or perpendicular toeach other, or extend approximately parallel or perpendicular to eachother within a measurement error as would be understood by a personhaving ordinary skill in the art. Further, it is to be understood thatwhile parameters may be described herein as having “about” a certainvalue, according to example embodiments, the parameter may be exactlythe certain value or approximately the certain value within ameasurement error as would be understood by a person having ordinaryskill in the art.

Further, when two or more processes or events are described as beingperformed at or occurring at substantially the same time (orsubstantially simultaneously), it is to be understood that the processesor events may be performed at or may occur at exactly the same time, orat about the same time as would be understood by a person havingordinary skill in the art. For example, the processes or events may beperformed at or may occur at about the same time within a measurementerror as would be understood by a person having ordinary skill in theart.

FIG. 1 is a diagram illustrating an image processing apparatus includingan image sensor, according to an example embodiment of the presentinventive concept.

Referring to FIG. 1 , an image processing apparatus 1 according to anexample embodiment of the present inventive concept may include an imagesensor 10 and an image processor 20. The image sensor 10 may include apixel array 11, a row driver 12, a read-out circuit 13, a column driver15, and a timing controller 14. The row driver 12, the read-out circuit13, the column driver 15, and the timing controller 14 are circuits usedto control the pixel array 11, and may be included in a control logic,as described in further detail below. In an example embodiment,additional components may be included in the image sensor 10.

The image sensor 10 may operate according to a control command receivedfrom the image processor 20, and may convert light from an object 30into an electrical signal and output the electrical signal to the imageprocessor 20. The pixel array 11 included in the image sensor 10 mayinclude a plurality of pixels PX, and the plurality of pixels PX mayinclude photoelectric elements that receive light and generate charges.A photoelectric element may be, for example, a photodiode PD. In anexample embodiment, at least one of the plurality of pixels PX mayinclude two or more photodiodes, and the image sensor 10 may provide anautofocusing function by using a phase difference of a pixel signalgenerated by each of two or more photodiodes included in at least one ofthe plurality of pixels PX.

In an example embodiment, each pixel of the plurality of pixels PX mayinclude a pixel circuit that generates a pixel signal from chargesgenerated by the photodiodes. In an example embodiment, the pixelcircuit may include, for example, a transfer transistor, a drivingtransistor, a selection transistor, and a reset transistor. The pixelcircuit may obtain the pixel signal by detecting a reset voltage and apixel voltage from each of the plurality of pixels PX and calculatingthe difference. The pixel voltage may be a voltage at which chargesgenerated in the photodiodes included in each pixel of the plurality ofpixels PX are reflected.

When the plurality of pixels PX have two or more photodiodes, each ofthe plurality of pixels PX may include a pixel circuit that processescharges generated in each of the two or more photodiodes. For example,according to example embodiments, the pixel circuit may include two ormore of at least one of the transfer transistor, the drive transistor,the selection transistor, and the reset transistor.

The row driver 12 may drive the pixel array 11 on a row basis. Forexample, the row driver 12 may generate a transfer control signal thatcontrols the transfer transistor of the pixel circuit, a reset controlsignal that controls the reset transistor of the pixel circuit, and aselection control signal that controls the selection transistor of thepixel circuit.

The read-out circuit 13 may include, for example, a correlated doublesampler CDS, an analog-to-digital converter ADC, etc. The correlateddouble sampler may be connected to the pixels PX included in the rowselected by the row selection signal supplied from the row driver 12through the column lines, and may perform correlated double sampling todetect the reset voltage and the pixel voltage. The analog-to-digitalconverter may convert the reset voltage and the pixel voltage detectedby the correlated double sampler into a digital signal and transmit theconverted voltages to the read-out circuit 15.

The column driver 15 may include, for example, a latch or buffer circuitcapable of temporarily storing the digital signal, an amplifyingcircuit, etc., and may temporarily store or amplify the digital signalreceived from the column driver 13 to generate image data. Operationtimings of the row driver 12, the read-out circuit 13, and the columndriver 15 may be determined by the timing controller 14, and the timingcontroller 14 may operate based on a control command transmitted fromthe image processor 20. The image processor 20 may signal-process theimage data output from the read-out circuit 15 to output the image datato a display device, or may store the image data in a storage devicesuch as a memory. In an example embodiment, the image processingapparatus 1 may be mounted on an autonomous vehicle, and the imageprocessor 20 may signal-process the image data and transmit the imagedata to a main controller to control the autonomous vehicle.

FIGS. 2 and 3 are diagrams illustrating an image sensor, according toexample embodiments of the present inventive concept.

For convenience of explanation, a duplicative description of elementsand technical aspects described with reference to FIG. 2 may be omittedwhen describing FIG. 3 .

First, referring to FIG. 2 , an image sensor 2 according to an exampleembodiment of the present inventive concept may include a first layer40, a second layer 50 disposed below the first layer 40, and a thirdlayer 60 disposed below the second layer 50. In an example embodiment,additional layers may be included. The first layer 40, the second layer50, and the third layer 60 may be stacked in a direction substantiallyperpendicular to each other. In an example embodiment, the first layer40 and the second layer 50 may be stacked on each other at a waferlevel, and the third layer 60 may be attached to a lower portion of thesecond layer 50 at a chip level. The first to third layers 40 to 60 maybe disposed in one semiconductor package.

The first layer 40 may be a semiconductor substrate that includes asensing area SA in which a plurality of pixels PX is disposed, and afirst pad area PA1 disposed around the sensing area SA. A plurality ofupper pads PAD may be included in the first pad area PA1. The pluralityof upper pads PAD may be connected to pads disposed in a second pad areaPA2 of the second layer 50 and a control logic LC through, for example,a via.

Each of the plurality of pixels PX may include, for example, aphotodiode that receives light and generates charges, and a pixelcircuit that processes the charges generated by the photodiode. Thepixel circuit may include a plurality of transistors that output avoltage corresponding to the charge generated by the photodiode.

The second layer 50 may include a plurality of devices that form thecontrol logic LC. The plurality of devices included in the control logicLC may be configured to provide circuits that drive the pixel circuitdisposed in the first layer 40. Herein, the control logic LC may also bereferred to as a control logic circuit. Thus, herein, the terms “controllogic” and “control logic circuit” may be used interchangeably. Theplurality of devices may include, for example, the row driver 12, thecolumn driver 13, and the timing controller 14, as well as additionaldevices. The plurality of devices included in the control logic LC maybe connected to the pixel circuit through the first and second pad areasPA1 and PA2. The control logic LC may obtain a reset voltage and a pixelvoltage from the plurality of pixels PX, and may generate a pixel signalusing the reset voltage and the pixel voltage.

In an example embodiment, at least one of the plurality of pixels PX mayinclude a plurality of photodiodes disposed on the same level. The pixelsignals generated from the charges of each of the plurality ofphotodiodes may have a phase difference from each other, and the controllogic LC may provide an autofocusing function based on the phasedifference of the pixel signals generated by the plurality ofphotodiodes included in one pixel PX.

The third layer 60 disposed below the second layer 50 may include amemory chip MC and a dummy chip DC, and a protection layer EN that sealsthe memory chip MC and the dummy chip DC. The memory chip MC may be, forexample, a dynamic random access memory DRAM or a static random accessmemory SRAM. The dummy chip DC is not capable of actually storing data.The memory chip MC may be electrically connected to at least a portionof the devices included in the control logic LC of the second layer 50by, for example, bumps, and may store information necessary to providethe autofocusing function. In an example embodiment, the bumps may be,for example, microbumps.

Next, referring to FIG. 3 , an image sensor 3 according to an exampleembodiment may include a first layer 70 and a second layer 80. The firstlayer 70 may include a sensing area SA in which a plurality of pixels PXare disposed, a control logic LC in which devices that drive theplurality of pixels PX are disposed, and a first pad area PA1 disposedaround the sensing area SA and the control logic LC. A plurality ofupper pads PAD may be included in the first pad area PA1. The pluralityof upper pads PAD may be connected to a memory chip MC disposed in thesecond layer 80 by, for example, a via. The second layer 80 may include,for example, the memory chip MC, a dummy chip DC, and a protective layerEN that seals the memory chip MC and the dummy chip DC.

FIG. 4 is a diagram illustrating an operation of an image sensor,according to an example embodiment of the present inventive concept.

Referring to FIG. 4 , an image sensor 100 according to an exampleembodiment of the present inventive concept may include, for example, apixel array 110, a row driver 120, and a read-out circuit 130. The rowdriver 120 may input a transfer control signal, a reset control signal,a selection control signal, etc. to each pixel circuit through row linesROW1 to ROWm included in a plurality of row lines ROW. The read-outcircuit 130 may detect the pixel voltage and the reset voltage from thepixels PX connected to the row line ROW selected by the row driver 120.The read-out circuit 130 may include, for example, a sampling circuit131 including a plurality of correlated double samplers CDS1 to CDSn,and an analog-to-digital converter 132 that converts outputs of thesampling circuit 131 SOUT1 to SOUTn included in a plurality of outputsSOUT into digital data. The digital data may correspond to, for example,DOUT in FIG. 4 , which may be output by the analog-to-digital converter132.

The pixel array 110 may include the plurality of row lines ROW extendingin one direction, and column lines COL1 to COLn included in a pluralityof column lines COL intersecting the row lines ROW. The row lines ROWand the column lines COL may be connected to pixels PX11 to PXmn. Eachof the pixels PX11 to PXmn may include the photodiode and the pixelcircuit. In an example embodiment, each of the pixels PX11 to PXmn mayinclude the plurality of photodiodes disposed on the same level, whichare used to provide the autofocusing function.

Referring to a comparative example, when each pixel of the plurality ofpixels PX11 to PXmn includes the plurality of photodiodes used toprovide the autofocusing function, the read-out circuit 130 may detectpixel voltages from each of the plurality of photodiodes. Therefore,since the pixel voltages are detected a plurality of times from each ofthe pixels PX11 to PXmn, the time and the power consumption required forthe read-out operation may be increased. In addition, since the pixelvoltage is detected from the photodiodes of each of the pixels PX11 toPXmn, a noise component appearing in the read-out operation mayincrease, and the performance of the image sensor 100 may be degraded.

In contrast, in an example embodiment of the present inventive concept,to solve the above-described problem that may occur in the comparativeexample, the pixel voltage at which the charge generated by at least aportion of the plurality of photodiodes included in each of the pixelsPX11 to PXmn is reflected may be read substantially simultaneously. As aresult, the time and the power consumption required for the read-outoperation may be reduced, the number of times the read-out operation isperformed may be reduced, and the noise component may be reduced, whichmay result in improved performance of the image sensor 100.

FIG. 5 is a diagram illustrating a pixel array of an image sensor,according to an example embodiment of the present inventive concept.

Referring to FIG. 5 , a pixel array 200 of an image sensor according toan example embodiment of the present inventive concept may include aplurality of pixels 210, 220, 230 and 240. The plurality of pixels 210to 240 may be arranged in a first direction (X-axis direction) and in asecond direction (Y-axis direction). Each pixel of the plurality ofpixels 210 to 240 may include a plurality of photodiodes PD1, PD2, PD3and PD4. In the example embodiment illustrated in FIG. 5 , each pixel ofthe plurality of pixels 210 to 240 includes four photodiodes PD1 to PD4.However, example embodiments are not limited thereto. For example,according to example embodiments, the number of the photodiodes PD1 toPD4 included in each pixel of the plurality of pixels 210 to 240 may bevariously modified.

In a typical case, the read-out circuit of the image sensor may read thepixel voltage from each of the plurality of photodiodes PD1 to PD4 toobtain the pixel signal. For example, an operation of obtaining thepixel signal from the first pixel 210 may include an operation ofreading the pixel voltage from each of the first to fourth photodiodesPD1 to PD4 included in the first pixel 210. Thus, to obtain the pixelsignal from the first pixel 210, the read-out operation in which thepixel voltage is read may be performed four times, which may lead to anincrease in the time and/or the power consumption required for theread-out operation. In addition, since the noise component is includedin the pixel voltage for each read-out operation, the image quality maybe degraded.

In example embodiments according to the present inventive concept, theread-out circuit may read the pixel voltage corresponding to the chargegenerated by at least a portion of the plurality of photodiodes PD1 toPD4 included in each pixel of the plurality of pixels 210 to 240substantially simultaneously. At least a portion of the photodiodes PD1to PD4 may be connected such that the read-out circuit may read thepixel voltage corresponding to the charge generated by at least aportion of the photodiodes PD1 to PD4 substantially simultaneously.

FIGS. 6 and 7 are circuit diagrams illustrating a pixel circuit of animage sensor, according to example embodiments of the present inventiveconcept. For example, the pixel circuit according to the exampleembodiments of FIGS. 6 and 7 may be the pixel circuit applied to theimage sensor illustrated in FIG. 5 .

For convenience of explanation, a duplicative description of elementsand technical aspects described with reference to FIG. 6 may be omittedwhen describing FIG. 7 .

First, referring to FIG. 6 , a pixel circuit of an image sensoraccording to an example embodiment of the present inventive concept mayinclude, for example, a reset transistor RX, a driving transistor DX, aselection transistor SX, a first transfer transistor TX1, and a secondtransfer transistor TX2. The first transfer transistor TX1 may beconnected to a first photodiode PD1 and a second photodiode PD2, and thesecond transfer transistor TX2 may be connected to a third photodiodePD3 and a fourth photodiode PD4.

Hereinafter, an operation of the pixel circuit illustrated in FIG. 6will be described.

First, when the reset transistor RX is turned on by a reset controlsignal RG, a floating diffusion region FD may be reset by a power supplyvoltage VDD. Then, when the selection transistor SX is turned on by aselection control signal SEL, the read-out circuit of the image sensormay detect the reset voltage from the floating diffusion region FDthrough the corresponding column line COL.

When the operation of detecting the reset voltage is completed, thefirst transfer transistor TX1 may be turned on. At this time, the secondtransfer transistor TX2 may be turned off. When the first transfertransistor TX1 is turned on by a first transfer control signal TG1, thecharge generated by the first and second photodiodes PD1 and PD2 may beaccumulated in the floating diffusion region FD. Then, when theselection transistor SX is turned on, the read-out circuit may detectthe first pixel voltage corresponding to the amount of charges generatedby the first and second photodiodes PD1 and PD2 through thecorresponding column line COL.

When the operation of detecting the first pixel voltage is completed,the second transfer transistor TX2 may be turned on. The second transfertransistor TX2 may be turned on by a second transfer control signal TG2.As the second transfer transistor TX2 is turned on, charges generated bythe third and fourth photodiodes PD3 and PD4 may be accumulated in thefloating diffusion region FD. At this time, the charges accumulated inthe floating diffusion region FD may be charges generated by the firstto fourth photodiodes PD1 to PD4. The read-out circuit may detect thepixel voltage corresponding to the total amount of charges generated bythe first to fourth photodiodes PD1 to PD4 through the correspondingcolumn line COL.

The control logic of the image sensor may obtain the second pixelvoltage corresponding to the amount of charges generated by the thirdand fourth photodiodes PD3 and PD4 by calculating the difference betweenthe pixel voltage and the first pixel voltage. The control logic mayobtain the first pixel signal and the second pixel signal by using thefirst pixel voltage and the second pixel voltage, and may provide theautofocusing function by using the phase difference between the firstpixel signal and the second pixel signal. The control logic may generatethe image data by using the pixel signal obtained from the pixel voltagecorresponding to the sum of the charges generated by the first to fourthphotodiodes PD1 to PD4.

In an example embodiment of the present inventive concept, the read-outcircuit does not obtain the pixel voltage from each of the photodiodesPD1 to PD4 through the pixel circuit, and the pixel voltage may be readsubstantially simultaneously from at least a portion of the photodiodesPD1 to PD4. Therefore, the number of times the read-out operation isperformed may be reduced. As a result, the time and/or the powerconsumption required for the read-out operation may be reduced, and theincrease of the noise component due to the increase in the number oftimes the read-out operation is performed may be significantly reduced.Accordingly, degradation of the image quality may be reduced.

Next, referring to FIG. 7 , in an example embodiment, the first transfertransistor TX1 may be connected to the first photodiode PD1, and thesecond transfer transistor TX2 may be connected to the second to fourthphotodiodes PD2 to PD4. When the first transfer transistor TX1 is turnedon such that the charge of the first photodiode PD1 is accumulated inthe floating diffusion region FD, the read-out circuit may detect thefirst pixel voltage corresponding to the charge of the first photodiodePD1. Next, when the second transfer transistor TX2 is turned on suchthat the charges of the second to fourth photodiodes PD2 to PD4 move tothe floating diffusion region FD, the read-out circuit may detect thepixel voltage corresponding to the sum of the charges generated by thefirst to fourth photodiodes PD1 to PD4.

The control logic may obtain the second pixel voltage corresponding tothe sum of the charges generated by the second to fourth photodiodes PD2to PD4 by calculating the difference between the pixel voltage and thefirst pixel voltage. The control logic may provide an autofocusingfunction using the phase difference between the first pixel signal andthe second pixel signal generated from the first pixel voltage and thesecond pixel voltage, respectively. In addition, the image data may begenerated by using the pixel signal generated from the pixel voltage.

In each of the example embodiments illustrated in FIGS. 6 and 7 , theautofocusing function may be provided in different directions. Forexample, in the example embodiment illustrated in FIG. 6 , the pixelvoltage may be detected substantially simultaneously from the charges ofthe first and second photodiodes PD1 and PD2, and the pixel voltage maybe detected substantially simultaneously from the charges of the thirdand fourth photodiodes PD3 and PD4. Therefore, assuming that the pixelcircuit of FIG. 6 is applied to the pixel array 200 of FIG. 5 , thepixel circuit of FIG. 6 may generate information necessary for focusingin the second direction (Y-axis direction). Similarly, the pixel circuitof FIG. 7 may provide information necessary for focusing in a directionwhich is rotated by about 45 degrees counterclockwise based on thesecond direction (Y-axis direction).

FIGS. 8 to 12 are diagrams illustrating a pixel structure of an imagesensor, according to an example embodiment of the present inventiveconcept.

Referring to FIG. 8 , a pixel array 300 of an image sensor according toan example embodiment of the present inventive concept may include aplurality of pixels 310, 320, 330 and 340. It should be understood that,for convenience of illustration, FIG. 8 illustrates only a partial areaof the pixel array 300.

Each pixel of the plurality of pixels 310 to 340 may include first tofourth photodiodes PD1, PD2, PD3 and PD4. The first to fourthphotodiodes PD1 to PD4 may be arranged in the first direction (X-axisdirection) and the second direction (Y-axis direction), and may belocated at substantially the same level in a third direction (Z-axisdirection). A first device isolation film 301 may be disposed betweenthe plurality of pixels 310 to 340, and a second device isolation film302 may be disposed for each pixel of the plurality of pixels 310 to340. A plurality of unit areas in which the first to fourth photodiodesPD1 to PD4 are formed in each pixel of the plurality of pixels 310 to340 may be defined by the second device isolation film 302.

In the example embodiment illustrated in FIG. 8 , at least a portion ofthe first to fourth photodiodes PD1 to PD4 in each pixel of theplurality of pixels 310 to 340 may be physically connected to eachother. For example, in the case of the first pixel 310, the first tothird photodiodes PD1 to PD3 may be physically connected to each otherto form a first photodiode group PG1. The fourth photodiode PD4 of thefirst pixel 310 may independently provide a second photodiode group PG2.In the second pixel 320, the first and second photodiodes PD1 and PD2may be physically connected to each other to provide the firstphotodiode group PG1, and the third and fourth photodiodes PD3 and PD4may be physically connected to each other to provide the secondphotodiode group PG2.

The first photodiode group PG1 of the third pixel 330 may include firstand third photodiodes PD1 and PD3 physically connected to each other,and the second photodiode group PG2 may include second and fourthphotodiodes PD2 and PD4 physically connected to each other. In the caseof the fourth pixel 340, the first photodiode PD1 may independentlyprovide the first photodiode group PG1, and the second to fourthphotodiodes PD2 to PD4 physically connected to each other may providethe second photodiode group PG2.

In the above description, an expression of being physically connectedmay be interpreted to mean that two or more of the first to fourthphotodiodes PD1 to PD4 are directly connected through a deviceconnection layer. For example, in an example embodiment, in the case ofthe first pixel 310, the first to third photodiodes PD1 to PD3 may becommonly connected to the device connection layer to form the firstphotodiode group PG1. In an example embodiment of the present inventiveconcept, the device connection layer that provides the first photodiodegroup PG1 or the second photodiode group PG2 may have different shapes,areas, etc. in the pixels 310 to 340 adjacent to each other. Forexample, the shape, the area, the number, etc. of each of the deviceconnection layers of the first pixel 310 and the second pixel 320 may bedifferent from each other.

For example, according to example embodiments, a device connection layerdisposed at a lower portion of the plurality of photodiodes PD1 to PD4may separate the plurality of photodiodes PD1 to PD4 into a firstphotodiode group PG1 and a second photodiode group PG2 by connecting atleast portions of the plurality of photodiodes PD1 to PD4 to each other.

At least a portion of the first to fourth photodiodes PD1 to PD4 may beconnected to each other through the device connection layer such thatthe pixel circuit may read the pixel voltage substantiallysimultaneously from the two or more photodiodes PD1 to PD4 connected tothe device connection layer. Accordingly, the number of read-outoperations performed to read the pixel voltage from each pixel of theplurality of pixels 310 to 340 may be reduced, thereby reducing therequired time and the power consumption of the read-out operationaccording to example embodiments. As a result, the noise increase due tothe increase in the number of times the read-out operation is performedmay be significantly reduced according to example embodiments. Inaddition, the transfer transistor may be connected in a one-by-onemanner to each of the first photodiode group PG1 and the secondphotodiode group PG2. For example, the number of the photodiodes PD1 toPD4 in each pixel of the plurality of pixels 310 to 340 may be greaterthan the number of the transfer transistors.

FIGS. 9 and 10 are cross-sectional views of the pixel array 300illustrated in FIG. 8 taken along lines I-I′ and II-II′, respectively.Referring to FIGS. 9 and 10 , the third pixel 330 and the fourth pixel340 may be separated from each other by the first device isolation film301, and the second device isolation film 302 may be formed inside ofeach of the third pixel 330 and the fourth pixel 340. Each of the thirdpixel 330 and the fourth pixel 340 may have a plurality of unit areasdefined by the second device isolation film 302, and the plurality ofphotodiodes PD1 to PD4 may be formed in the plurality of unit areas.

The third pixel 330 and the fourth pixel 340 may include microlenses 331and 341, color filters 333 and 343, and pixel circuits 335 and 345. Ineach of the third pixel 330 and the fourth pixel 340 disposed adjacentto each other, the color filters 333 and 343 may transfer differentcolors of light. For example, the color filter 333 of the third pixel330 may be a green color filter that transfers green light, and thecolor filter 343 of the fourth pixel 340 may be a red color filter thattransfers red light. The pixel circuits 335 and 345 may include, forexample, a driving transistor, a reset transistor, a selectiontransistor, a transfer transistor, etc.

In the third pixel 330, the first and third photodiodes PD1 and PD3 maybe connected to each other by the first device connection layer CL1 toprovide the first photodiode group PG1, and the second and fourthphotodiodes PD2 and PD4 may be connected to each other by the seconddevice connection layer CL2 to provide the second photodiode group PG2.In the fourth pixel 340, the second to fourth photodiodes PD2 to PD4 maybe connected to each other by one device connection layer CL to providethe second photodiode group PG2.

As illustrated in FIGS. 9 and 10 , the device connection layers CL1,CL2, and CL may be disposed between the photodiodes PD1 to PD4 and thepixel circuits 335 and 345. Further, in an example embodiment, thedevice isolation films 301 and 302 are not connected to all of the colorfilters 333 and 343 and the pixel circuits 335 and 345. The deviceconnection layers CL1, CL2 and CL may be formed in areas in which thedevice isolation films 301 and 302 are not formed. For example, thedevice connection layers CL1, CL2, and CL may be doped with impuritiesto physically connect some of the photodiodes PD1 to PD4 and to beelectrically connected to the floating diffusion region of the pixelcircuits 335 and 345. In an example embodiment, the device connectionlayers CL1, CL2, and CL may be doped with an N-type impurity.

FIG. 11 is a cross-sectional view of the pixel array 300 illustrated inFIG. 8 taken along line III-III′. Referring to FIG. 11 , the first pixel310 and the third pixel 330 may be separated from each other by thefirst isolation film 301, and the second device isolation film 302 maybe formed inside of each of the third pixel 330 and the fourth pixel340. The depths of the first device isolation film 301 and the seconddevice isolation film 302 in the third direction (Z-axis direction) maybe smaller than the depth of the semiconductor substrate in which thephotodiodes PD1 to PD4 are formed. The first pixel 310 may include amicrolens 311 and a color filter 313.

In the first pixel 310, the first to third photodiodes PD1 to PD3 may beconnected by the device connection layer CL. The first to thirdphotodiodes PD1 to PD3 connected by the device connection layer CL mayprovide the first photodiode group PG1, and the fourth photodiode PD4may independently provide the second photodiode group PG2. A pixelcircuit 315 of the first pixel 310 may obtain a first pixel voltagecorresponding to the sum of charges generated in the first to thirdphotodiodes PD1 to PD3 through the device connection layer CLsubstantially simultaneously. Thus, by reducing the number of read-outoperations for obtaining the pixel voltage, the operating speed, thepower consumption, and/or the noise characteristic of the image sensormay be improved.

FIG. 12 is a cross-sectional view of the pixel array 300 illustrated inFIG. 8 taken along line IV-IV′. Referring to FIG. 12 , the second pixel320 and the fourth pixel 340 may be separated from each other by thefirst device isolation film 301, and the second device isolation film302 may be formed inside of each of the second pixel 320 and the fourthpixel 340. The second pixel 320 may include a microlens 321, a colorfilter 323, and a pixel circuit 325. The device connection layers CL1,CL2, and CL may be disposed between the device isolation films 301 and302 and the pixel circuits 325 and 345 in the third direction (Z-axisdirection).

The second pixel 320 may include a first photodiode group PG1 having afirst device connection layer CL1 and first and second photodiodes PD1and PD2, and a second photodiode group PG2 having a second deviceconnection layer CL2 and third and fourth photodiodes PD3 and PD4. Inthe fourth pixel 340, the second to fourth photodiodes PD2 to PD4 may bephysically connected to each other by one device connection layer CL toprovide the second photodiode group PG2.

An image sensor may provide an autofocusing function using a phasedifference of the pixel signals obtained from the photodiode groups PG1and PG2 of each of the pixels 310 to 340. In an example embodimentdescribed with reference to FIGS. 8 to 12 , the photodiode groups PG1and PG2 may have different shapes and/or areas in at least a portion ofthe pixels 310 to 340 adjacent to each other. Accordingly, since atleast a portion of the pixels 310 to 340 adjacent to each other provideinformation necessary for focusing in different directions, theperformance of the image sensor may be improved by providing anautofocusing function in various directions. In addition, by bundling atleast a portion of the photodiodes PD1 to PD4 included in each of thepixels 310 to 340 into the photodiode groups PG1 and PG2, the powerconsumption and the time required for the read-out operation, and anoise generated in the read-out operation, may be reduced according toexample embodiments of the present inventive concept.

FIGS. 13 and 14 are diagrams illustrating a pixel structure of an imagesensor, according to an example embodiment of the present inventiveconcept.

FIG. 13 is a plan diagram illustrating a partial area of a pixel array400 of an image sensor according to an example embodiment of the presentinventive concept. FIG. 14 is a cross-sectional view of the pixel array400 illustrated in FIG. 13 taken along line V-V.

Referring to FIGS. 13 and 14 , a plurality of pixels 410, 420, 430 and440 may be separated from each other by a device isolation film 401.Each pixel of the plurality of pixels 410 to 440 may include the firstto fourth photodiodes PD1 to PD4. In each pixel of the plurality ofpixels 410 to 440, at least a portion of the first to fourth photodiodesPD1 to PD4 may be connected to each other to provide the firstphotodiode group PG1 or the second photodiode group PG2. The photodiodegroups PG1 and PG2 may be defined by the device connection layers CL1,CL2, and CL connecting at least a portion of the first to fourthphotodiodes PD1 to PD4. The third pixel 430 may include a microlens 431,a color filter 433, and a pixel circuit 435. The fourth pixel 440 mayinclude a microlens 441, a color filter 443, and a pixel circuit 445.

In the example embodiment illustrated in FIGS. 13 and 14 , the deviceisolation film 401 may only be formed at a boundary between theplurality of pixels 410 to 440, and the device isolation film 401 is notformed inside of each pixel of the plurality of pixels 410 to 440. Inaddition, referring to FIG. 14 , the device connection layers CL1, CL2,and CL may be disposed between the pixel circuits 435 and 445 and thecolor filters 433 and 443 to physically connect at least a portion ofthe first to fourth photodiodes PD1 to PD4 to each other.

The device connection layers CL1, CL2, and CL may be doped with anN-type impurity, and the device connection layers CL1, CL2, and CLincluded in the plurality of pixels 410 to 440 adjacent to each othermay have different shapes or areas. For example, the device connectionlayer CL formed in the fourth pixel 440 may have a larger area than thefirst and second device connection layers CL1 and CL2 formed in thethird pixel 430.

Light receiving areas of the photodiode groups PG1 and PG2 included inthe plurality of pixels 410 to 440 may be determined by the deviceconnection layers CL1, CL2, and CL. For example, in an exampleembodiment, the photodiode groups PG1 and PG2 of the third pixel 430 mayhave different light receiving areas from the photodiode groups PG1 andPG2 of the fourth pixel 440. In contrast, in an example embodiment, thephotodiode groups PG1 and PG2 of the third pixel 430 may havesubstantially the same light receiving area as the photodiode groups PG1and PG2 of the second pixel 420.

FIGS. 15 and 16 are diagrams illustrating a pixel structure of an imagesensor, according to an example embodiment of the present inventiveconcept.

FIG. 15 is a plan diagram illustrating a partial area of a pixel array500 of an image sensor, according to an example embodiment of thepresent inventive concept. FIG. 16 is a cross-sectional view of thepixel array 500 illustrated in FIG. 15 taken along line VI-VI′.

The pixel array 500 may include a plurality of pixels 510, 520, 530 and540 separated by a device isolation film 501. A plurality of photodiodesPD1 to PD4 may be disposed along a first direction (X-axis direction)and a second direction (Y-axis direction) in each pixel of the pluralityof pixels 510 to 540. At least a portion of the plurality of photodiodesPD1 to PD4 in each pixel of the plurality of pixels 510 to 540 may beconnected to each other by the device connection layers CL1, CL2, and CLto provide the photodiode groups PG1 and PG2. Referring to FIG. 16 , thethird pixel 530 may include a microlens 531, a color filter 533, and apixel circuit 535. The fourth pixel 540 may include a microlens 541, acolor filter 543, and a pixel circuit 545. The device connection layersCL1, CL2, and CL may be disposed between the pixel circuits 535 and 545and the color filters 533 and 543. The microlenses 531 and 541 may beformed in an upper portion of the color filters 533 and 543.

In the example embodiment illustrated in FIGS. 15 and 16 , a chargetransfer layer CM connecting the photodiodes PD1 to PD4 to each othermay be formed. For example, in the third pixel 530, when light isexcessively introduced into the first photodiode PD1 to be saturated,some charges generated in the first photodiode PD1 may be transferred tothe second photodiode PD2 through the charge transfer layer CM.Therefore, the saturation of the photodiodes PD1 to PD4 may be preventedor reduced by the charge transfer layer CM. The charge transfer layer CMmay be connected between the different photodiode groups PG1 and PG2, ormay also be connected between the photodiodes PD1 to PD4 belonging tothe same photodiode groups PG1 and PG2 according to an exampleembodiment. As illustrated in FIG. 16 , the charge transfer layer CM maybe positioned between the device connection layers CL1, CL2, and CL andthe color filters 533 and 543 in the third direction (Z-axis direction).

FIG. 17 is a diagram illustrating an image sensor, according to anexample embodiment of the present inventive concept.

FIG. 17 is a plan diagram illustrating a partial area of a pixel array600 of an image sensor, according to an example embodiment of thepresent inventive concept. Referring to FIG. 17 , the pixel array 600may include a plurality of pixels 610, 620, 630 and 640 arranged in afirst direction (X-axis direction) and a second direction (Y-axisdirection). Each pixel of the plurality of pixels 610 to 640 may includethe plurality of photodiodes PD1 to PD4. The number of the plurality ofphotodiodes PD1 to PD4 included in each pixel of the plurality of pixels610 to 640 may be variously modified.

In the example embodiment illustrated in FIG. 17 , each pixel of theplurality of pixels 610 to 640 may include transfer transistorsconnected to the plurality of photodiodes PD1 to PD4. In each pixel ofthe plurality of pixels 610 to 640, the number of the photodiodes PD1 toPD4 and the number of the transfer transistors may be equal to eachother. In addition, in each pixel of the plurality of pixels 610 to 640,at least a portion of gate electrode layers of the transfer transistorsmay be connected to each other by connection lines 611, 612, 621, 622,631, 632, 641, and 642.

For example, referring to the first pixel 610, the gate electrode layersof the transfer transistors connected to the first photodiode PD1 andthe third photodiode PD3 may be connected to each other by a firstconnection line 611. The first connection line 611 may be connected to afirst transmission control line TL1 through an intermediate line 613.The gate electrode layers of the transfer transistors connected to thesecond photodiode PD2 and the fourth photodiode PD4 in the first pixel610 may be connected to each other by a second connection line 612. Thesecond connection line 612 may be connected to a second transmissioncontrol line TL2 through an intermediate line 614.

Therefore, charges generated in the first photodiode PD1 and the thirdphotodiode PD3 may be moved together to a floating diffusion region bythe transfer control signal transmitted through the first transfercontrol line TL1. In addition, charges generated in the secondphotodiode PD2 and the fourth photodiode PD4 may be moved together to afloating diffusion region by the transfer control signal transmittedthrough the second transfer control line TL2. For example, the first andthird photodiodes PD1 and PD3 may operate as the first photodiode groupPG1, and the second and fourth photodiodes PD2 and PD4 may operate asthe second photodiode group PG2.

Next, referring to a second pixel 620, the gate electrode layers of thetransfer transistors connected to the first photodiode PD1 and thesecond photodiode PD2 may be connected to each other by the firstconnection line 621. The first connection line 621 may be connected tothe first transfer control line TL1 through an intermediate line 623.The gate electrode layers of the transfer transistors connected to thethird photodiode PD3 and the fourth photodiode PD4 in the second pixel620 may be connected to each other by a second connection line 622. Thesecond connection line 622 may be connected to the second transfercontrol line TL2 through an intermediate line 624.

According to example embodiments, at least some of the connection lines611, 612, 621, 622, 631, 632, 641, and 642 may separate the plurality ofphotodiodes PD1 to PD4 into first and second photodiode groups PG1 andPG2 by connecting at least a portion of gate electrode layers of theplurality of transfer transistors to each other.

The charges generated in the first photodiode PD1 and the secondphotodiode PD2 of the second pixel 620 may be moved together to thefloating diffusion region by the transfer control signal transmittedthrough the first transfer control line TL1. In addition, the chargesgenerated in the third photodiode PD3 and the fourth photodiode PD4 ofthe second pixel 620 may be moved together to the floating diffusionregion by the transfer control signal transmitted through the secondtransfer control line TL2. For example, the first and second photodiodesPD1 and PD2 may operate as the first photodiode group PG1, and the thirdand fourth photodiodes PD3 and PD4 may operate as the second photodiodegroup PG2.

In an example embodiment, the third pixel 630 may have a structuresimilar to the first pixel 610, and the fourth pixel 640 may have astructure similar to the second pixel 620. Alternatively, in an exampleembodiment, the third pixel 630 may have a structure similar to thesecond pixel 620, and the fourth pixel 640 may have a structure similarto the first pixel 610.

Referring to the first pixel 610 and the second pixel 620, the firsttransfer line TL1 may be connected to the first photodiode group PG1,and the second transfer line TL2 may be connected to the secondphotodiode group PG2. Accordingly, the first photodiode groups PG1 ofthe first pixel 610 and the second pixel 620 may be substantiallysimultaneously activated through the first transfer line TL1, and thesecond photodiode groups PG2 of the first pixel 610 and the second pixel620 may be substantially simultaneously activated through the secondtransfer line TL2.

Referring to the third pixel 630, the connection line 631 may beconnected to a first transmission control line TL1 through anintermediate line 633, and the connection line 632 may be connected to asecond transmission control line TL2 through an intermediate line 634.

Referring to the fourth pixel 640, the connection line 641 may beconnected to a first transmission control line TL1 through anintermediate line 643, and the connection line 642 may be connected to asecond transmission control line TL2 through an intermediate line 644.

Hereinafter, an operation of an image sensor will be described in moredetail with reference to FIGS. 18 and 19 .

FIG. 18 is a circuit diagram illustrating a pixel circuit of an imagesensor, according to an example embodiment of the present inventiveconcept. FIG. 19 is a timing diagram illustrating an operation of animage sensor, according to an example embodiment of the presentinventive concept.

FIG. 18 is a circuit diagram illustrating the pixel circuits of thefirst pixel 610 and the second pixel 620 of the pixel array 600illustrated in FIG. 17 . Referring to FIG. 18 , each of the first pixel610 and the second pixel 620 may include first to fourth photodiodes PD1to PD4, first to fourth transfer transistors TX1 to TX4, a resettransistor RX, a driving transistor DX, and a selection transistor SX.The selection transistor SX of the first pixel 610 may be connected to afirst column line COL1, and the selection transistor SX of the secondpixel 620 may be connected to a second column line COL2.

The reset transistor RX of the first pixel 610 and the second pixel 620may be controlled by a reset control signal RG, and the selectiontransistor SX of the first pixel 610 and the second pixel 620 may becontrolled by a selection control signal SEL. The first and thirdtransfer transistors TX1 and TX3 of the first pixel 610 and the firstand second transfer transistors TX1 and TX2 of the second pixel 620 maybe controlled by the first transfer control signal TG1 transmittedthrough the first transfer control line TL1. In addition, the second andfourth transfer transistors TX2 and TX4 of the first pixel 610 and thethird and fourth transfer transistors TX3 and TX4 of the second pixel620 may be controlled by the second transfer control signal TG2transmitted through the second transfer control line TL2.

Referring to FIG. 19 , an operation of an image sensor according to anexample embodiment of the present inventive concept may be started bythe reset transistor RX being turned on by the reset control signal RG.As the reset transistor RX is turned on, the floating diffusion regionFD of the first pixel 610 and the second pixel 620 may be reset by thepower supply voltage VDD. Referring to FIG. 19 , after the resettransistor RX is turned off, the read-out circuit may sample the resetvoltage of each of the first pixel 610 and the second pixel 620 during areset sampling time TR in which a reset voltage sampling signal SHR hasa high logic value.

When the reset sampling time TR elapses, the first and third transfertransistors TX1 and TX3 of the first pixel 610 and the first and secondtransfer transistors TX1 and TX2 of the second pixel 620 may be turnedon by the first transfer control signal TG1. Therefore, the charges ofthe first and third photodiodes PD1 and PD3 of the first pixel 610 maymove together to the floating diffusion region FD. Further, the chargesof the first and second photodiodes PD1 and PD2 of the second pixel 620may move together to the floating diffusion region FD.

When the first and third transfer transistors TX1 and TX3 of the firstpixel 610 and the first and second transfer transistors TX1 and TX2 ofthe second pixel 620 are turned off, the read-out circuit may obtain thefirst pixel voltage at each of the first pixel 610 and the second pixel620 in response to a pixel voltage sampling signal SHS. The first pixelvoltage obtained by the read-out circuit at the first pixel 610 may be avoltage corresponding to the charges of the first and third photodiodesPD1 and PD3 of the first pixel 610. Further, the first pixel voltageobtained by the read-out circuit at the second pixel 620 may be avoltage corresponding to the charges of the first and second photodiodesPD1 and PD2 of the second pixel 620. The first pixel voltages obtainedby the read-out circuit may be stored in, for example, a memory. Forexample, the memory may be a memory included in an image sensor and onesemiconductor package.

When the first sampling time TS1 elapses, the second and fourth transfertransistors TX2 and TX4 of the first pixel 610 and the third and fourthtransfer transistors TX3 and TX4 of the second pixel 620 may be turnedon by the second transfer control signal TG2. Therefore, the charges ofthe second and fourth photodiodes PD2 and PD4 of the first pixel 610 maymove together to the floating diffusion region FD. In addition, thecharges of the third and fourth photodiodes PD3 and PD4 of the secondpixel 620 may move together to the floating diffusion region FD.

In an example embodiment, there is not a period in which the floatingdiffusion region FD is reset by the reset control signal RG between theperiods in which each of the first transfer control signal TG1 and thesecond transfer control signal TG2 has a high logic value. Therefore,while the second transfer control signal TG2 has a high logic value, ineach of the floating diffusion regions FD of the first pixel 610 and thesecond pixel 620, the charges generated in the first to fourthphotodiodes PD1 to PD4 may be accumulated.

When the second and fourth transfer transistors TX2 and TX4 of the firstpixel 610 and the third and fourth transfer transistors TX3 and TX4 ofthe second pixel 620 are turned off by the second transfer controlsignal TG2, the read-out circuit may detect the pixel voltage during thesecond sampling time TS2. The pixel voltage detected by the read-outcircuit from the first pixel 610 may be a voltage corresponding to thesum of the charges of the first to fourth photodiodes PD1 to PD4 of thefirst pixel 610. Similarly, the pixel voltage detected by the read-outcircuit from the second pixel 620 may be a voltage corresponding to thesum of the charges of the first to fourth photodiodes PD1 to PD4 of thesecond pixel 620.

A control logic including the read-out circuit may generate image datausing the pixel voltages detected at each of the first pixel 610 and thesecond pixel 620. In addition, the control logic may obtain a secondpixel voltage by calculating the difference between the pixel voltagedetected in each of the first pixel 610 and the second pixel 620 and thefirst pixel voltage. In the case of the first pixel 610, the secondpixel voltage may be a voltage corresponding to charges generated in thesecond and fourth photodiodes PD2 and PD4. In the case of the secondpixel 620, the second pixel voltage may be a voltage corresponding tocharges generated in the third and fourth photodiodes PD3 and PD4.

The control logic may calculate the first pixel signal and the secondpixel signal in each pixel of the plurality of pixels 610 to 640 usingthe first pixel voltage and the second pixel voltage obtained in theabove-described manner. For example, the first pixel signal may be asignal corresponding to the charge generated in the first photodiodegroup PG1 of each pixel of the plurality of pixels 610 to 640, and thesecond pixel signal may be a signal corresponding to the chargesgenerated in the second photodiode group PG2.

The control logic may calculate the phase difference between the firstpixel signal and the second pixel signal to generate informationnecessary for focus adjustment of the image sensor. As illustrated inFIG. 17 , since the first photodiode group PG1 and the second photodiodegroup PG2 are defined in different manners in at least a portion of thepixels 610 to 640, the control logic may generate information necessaryto adjust the focus in various directions. At the same time, informationnecessary for focus adjustment, and image data, may be obtained only bya read-out operation less than the number of the photodiodes PD1 to PD4included in each pixel of the plurality of pixels 610 to 640. Therefore,the time and power consumption required for the read-out operation maybe reduced, and the influence of noise generated in the read-outoperation may be reduced, thereby improving the performance of the imagesensor.

As shown in the figures illustrating cross-sectional views of theplurality of photodiodes PD1 to PD4, according to example embodiments,at least some of the plurality of photodiodes PD1 to PD4 may be formedat about the same depth in the semiconductor substrate (e.g., the firstlayer 40 in FIG. 2 ) in which they are formed. For example, in exampleembodiments, the height of each of at least some of the plurality ofphotodiodes PD1 to PD4 may be about equal to each other. Further, inexample embodiments, the distance between an upper surface of each of atleast some of the plurality of photodiodes PD1 to PD4 and an uppersurface of the semiconductor substrate in which they are formed may beabout the same as each other.

FIG. 20 is a block diagram illustrating an electronic apparatusincluding an image sensor, according to an example embodiment of thepresent inventive concept.

A computer device 1000 according to the example embodiment illustratedin FIG. 20 may include an image sensor 1010, a display 1020, a memory1030, a processor 1040, and a port 1050. In addition, the computerdevice 1000 may further include a wired/wireless communication device, apower supply device, etc. Among the components illustrated in FIG. 20 ,the port 1050 may used, for example, to communicate with a video card, asound card, a memory card, a USB device, etc. The computer device 1000may be, for example, a desktop computer or a laptop computer, asmartphone, a tablet PC, a wearable device such as a smartwatch, etc.

The processor 1040 may perform specific operations or commands, tasks,etc. The processor 1040 may be, for example, a central processing unitCPU or a microprocessing unit MCU, a system on chip SOC, etc., and maycommunicate with the image sensor 1010, the display 1020, and the memory1030, as well as other devices connected to the port 1050 via a bus1060.

The memory 1030 may be a storage medium that stores data necessary forthe operation of the computer device 1000, multimedia data, etc. Thememory 1030 may include a volatile memory such as a random access memoryRAM, or a non-volatile memory, such as a flash memory. In addition, thememory 1030 may also include at least one of a solid state drive SSD, ahard disk drive HDD, and an optical drive ODD as a storage device. Theinput/output device may include an input device such as a keyboard, amouse, a touch screen, etc., and an output device such as a display, anaudio output unit, etc.

The image sensor 1010 may be mounted on a package substrate andconnected to the processor 1040 by the bus 1060 or other communicationmeans. The image sensor 1010 may be employed in the computer device 1000in the form of the various example embodiments described with referenceto FIGS. 1 to 19 .

As is traditional in the field of the present inventive concept, exampleembodiments are described, and illustrated in the drawings, in terms offunctional blocks, units and/or modules. Those skilled in the art willappreciate that these blocks, units and/or modules are physicallyimplemented by electronic (or optical) circuits such as logic circuits,discrete components, microprocessors, hard-wired circuits, memoryelements, wiring connections, etc., which may be formed usingsemiconductor-based fabrication techniques or other manufacturingtechnologies. In the case of the blocks, units and/or modules beingimplemented by microprocessors or similar, they may be programmed usingsoftware (e.g., microcode) to perform various functions discussed hereinand may optionally be driven by firmware and/or software. Alternatively,each block, unit and/or module may be implemented by dedicated hardware,or as a combination of dedicated hardware to perform some functions anda processor (e.g., one or more programmed microprocessors and associatedcircuitry) to perform other functions.

As set forth above, according to example embodiments of the presentinventive concept, by reading pixel voltages corresponding to chargesgenerated in at least a part of a plurality of photodiodes included ineach of a plurality of pixels of an image sensor substantiallysimultaneously, the read-out time and the power consumed in the read-outoperation may be reduced.

While the present inventive concept has been particularly shown anddescribed with reference to the example embodiments thereof, it will beunderstood by those of ordinary skill in the art that various changes inform and detail may be made therein without departing from the spiritand scope of the present inventive concept as defined by the followingclaims.

What is claimed is:
 1. An image sensor, comprising: a pixel arraycomprising a plurality of pixels; and a control logic configured togenerate image data using charges generated in each of the plurality ofpixels, wherein each of the plurality of pixels comprises a plurality ofphotodiodes formed at about a same depth in a semiconductor substrate, apixel circuit below the plurality of photodiodes, and a deviceconnection layer that physically connects at least portions of theplurality of photodiodes to each other and being disposed between thepixel circuit and the plurality of photodiodes.
 2. The image sensor ofclaim 1, wherein each of the plurality of pixels comprises a firstphotodiode, a second photodiode, a third photodiode and a fourthphotodiode.
 3. The image sensor of claim 2, wherein the deviceconnection layer comprises: a first device connection layer thatphysically connects the first photodiode and the second photodiode toeach other; and a second device connection layer that physicallyconnects the third photodiode and the fourth photodiode to each other.4. The image sensor of claim 2, wherein the device connection layerphysically connects three photodiodes among the first to fourthphotodiodes to each other.
 5. The image sensor of claim 1, wherein atleast one of the plurality of pixels comprises a charge transfer layerformed between at least a portion of the plurality of photodiodes,wherein the charge transfer layer provides a transfer path for thecharges.
 6. The image sensor of claim 1, wherein each of the pluralityof pixels comprises: a floating diffusion region that accumulates atleast a portion of the charges generated by the plurality ofphotodiodes; and a plurality of transfer transistors connected betweenthe floating diffusion region and the plurality of photodiodes, whereina number of the plurality of photodiodes is greater than a number of theplurality of transfer transistors.
 7. An image sensor, comprising: apixel array comprising a plurality of pixels; and a control logiccircuit configured to generate image data using charges generated ineach of the plurality of pixels, wherein each of the plurality of pixelscomprises: a plurality of photodiodes formed at about a same depth in asemiconductor substrate; a plurality of transfer transistors connectedto the plurality of photodiodes; and a connection line that connectsgate electrode layers of at least a portion of transfer transistorsamong the plurality of transfer transistors to each other.
 8. The imagesensor of claim 7, wherein the connection line comprises a firstconnection line and a second connection line.
 9. The image sensor ofclaim 8, wherein, in a first pixel and a second pixel adjacent to eachother among the plurality of pixels, the first connection line of thefirst pixel is connected to the first connection line of the secondpixel, and the second connection line of the first pixel is connected tothe second connection line of the second pixel.
 10. The image sensor ofclaim 7, wherein the plurality of pixels comprises a first pixel and asecond pixel disposed adjacent to each other, the connection line of thefirst pixel extends in a first direction, and the connection line of thesecond pixel extends in a second direction intersecting the firstdirection.
 11. The image sensor of claim 7, wherein a number of theplurality of photodiodes is equal to a number of the plurality oftransfer transistors.